Thin film circuit

ABSTRACT

A practical operational amplifier circuit is formed using thin film transistors.  
     An operational amplifier circuit is formed by thin film transistors formed on a quartz substrate wherein 90% or more of n-channel type thin film transistors have mobility at a value of 260 cm 2 /Vs or more and wherein 90% or more of p-channel type thin film transistors have mobility at a value of 150 cm 2 /Vs or more. The thin film transistors have active layers formed using a crystalline silicon film fabricated using a metal element that promoted crystallization of silicon. The crystalline silicon film is a collection of a multiplicity of elongate crystal structures extending in a certain direction, and the above-described characteristics can be achieved by matching the extending direction and the moving direction of carriers.

BACKGROUND OF THE INVENTION

[0001] 1. Field of the Invention

[0002] The present invention relates to a semiconductor circuitutilizing a crystalline silicon film formed on a quartz substrate or thelike and, more particularly, to a semiconductor circuit having thefunction of an operational amplifier.

[0003] 2. Description of the Related Art

[0004] Recently, researches are being carried out on techniques forforming semiconductor devices utilizing a crystalline silicon film on aquartz substrate in an integrated manner. A typical example of suchtechniques is a technique for providing an active matrix circuit and aperipheral driving circuit for driving the same circuit on a singlequartz substrate or glass substrate.

[0005] The required circuit configurations include active matrixcircuits, shift register circuits and buffer circuits.

[0006] An active layer of a thin film transistor forming a part of acircuit is formed using a crystalline silicon film. A crystallinesilicon film can be fabricated by forming an amorphous silicon film on asubstrate and then heating the same or irradiating the same with laserbeams or performing both to anneal the same.

[0007] A thin film transistor having an active layer formed by acrystalline silicon film is more excellent in characteristics such asmobility than those having an active layer formed by an amorphoussilicon film.

[0008] There is a need for higher levels of integration and higherperformance also for circuits formed using thin film transistors.

[0009] Recently, it is contemplated to use thin film transistors toconfigure, on a substrate, not only logic circuits such as shiftregisters but also circuits having computing functions such asoperational amplifiers which have conventionally been externallyattached to a substrate.

[0010] Operational amplifier circuits have been generally configuredusing a single crystal silicon wafer.

[0011] An operational amplifier is basically comprised of a differentialamplifier circuit. A differential amplifier circuit is formed bycombining two transistors having similar characteristics.

[0012] In the case of a differential amplifier circuit, a change intemperature or power supply voltage affect the two transistorssimultaneously. Therefore, a change in temperature or power supplyvoltage does not affect the output of the same.

[0013] In order for this, the two transistors forming the differentialamplifier circuit must have similar characteristics.

[0014] In practice, since it is difficult to provide two transistorshaving completely identical characteristics, efforts are being madetoward manufacturing techniques to provide transistors as much similarto each other as possible in their characteristics.

[0015] Thin film transistors utilizing a crystalline silicon film havemobility lower than that of MOS transistors fabricated using a singlecrystal silicon wafer. Further, they have a higher level of variation incharacteristics.

[0016] For this reason, it has been difficult in practice to form anoperation amplifier circuit using such thin film transistors.

[0017] The present invention solves this problem. Specifically, it is anobject of the invention to form a practical operational amplifiercircuit using thin film transistors.

SUMMARY OF THE INVENTION

[0018] According to an aspect of the invention, there is provided agroup of operational amplifier circuits constituted by thin filmtransistors formed on an insulating surface characterized in that:

[0019] the operational amplifier circuits comprise a combination of atleast n-channel type thin film transistors and p-channel type thin filmtransistors;

[0020] 90% or more of the n-channel type thin film transistors havemobility at a value of 260 cm²/Vs or more; and

[0021] 90% or more of the p-channel type thin film transistors havemobility at a value of 150/Vs or more.

[0022] The above-described structure is formed on an insulatingsubstrate represented by a quartz substrate. The use of a substratehaving insulating properties makes it possible to configure a circuitsuitable for operations at high speeds because it eliminates effects ofcapacitance of a substrate. According to another aspect of theinvention, an active layer of a thin film transistor is formed by acrystalline silicon film having a structure in which a multiplicity ofcolumnar crystal structures extend in a direction that matches themoving direction of carriers.

[0023] According to the invention, since a thin film semiconductor isused for the active layer, the source and drain regions can be activated(after doping) by irradiating them with laser beams or intense beams.

[0024] This allows the use of aluminum which is a low-resistancematerial or a material mainly composed of aluminum for the gateelectrode to improve adaptability to high speed operations.

[0025] Further, since the unique crystal structure suppresses theshort-channel effect, predetermined operational performance can beachieved with dimensions larger than dimensions indicated byconventional scaling rules.

[0026] For example, when the above-described crystalline silicon film isused, a gate insulation film having a thickness on the order of 500 Åprovides characteristics that have been available with only a gateinsulation film having a thickness on the order of 200 Å according toconventional scaling rules.

[0027] It is technically and economically difficult to form a thin gateinsulation film having preferable interface characteristics, no pin holeand a high withstand voltage over a large surface area.

[0028] From this point of view, it is advantageous to achievepredetermined characteristics free of limitations placed by conventionalscaling rules.

[0029] In addition, the average S-value of thin film transistorsutilizing a crystalline silicon film having the above-described uniquecrystal structure can be 100 mV/dec or less for either of p- andn-channel type thin film transistors even when a multiplicity of thesame are formed on a substrate.

[0030] The S-value of a TFT fabricated using a general high temperatureprocess (a general term that refers to processes for fabricating a TFTon a quartz substrate using an annealing step at about 1000° C.) isabout 200 mV/dec or more when it is an n-channel type TFT and about 350mV/dec or more when it is a p-channel type TFT.

[0031] The S-value of a TFT fabricated using a low temperature process(a general term that refers to processes for fabricating a TFT on aquartz substrate using a laser annealing step) is worse than that of aTFT fabricated using a high temperature process.

[0032] According to another aspect of the invention, there is provided agroup of operational amplifier circuits constituted by thin filmtransistors formed on an insulating surface characterized in that:

[0033] the operational amplifier circuits comprise a combination of atleast n-channel type thin film transistors and p-channel type thin filmtransistors; and

[0034] active layers of the thin film transistors comprise a crystallinesilicon film having a structure wherein a multiplicity of columnarcrystal structures extend in a direction that matches the movingdirection of carriers.

BRIEF DESCRIPTION OF THE DRAWINGS

[0035]FIG. 1 is a diagram showing an equivalent circuit of anoperational amplifier.

[0036]FIG. 2 illustrates the arrangement of patterns on an operationalamplifier constituted by thin film transistors formed on a quartzsubstrate.

[0037]FIG. 3 is a sectional view taken along the line A-A′ in FIG. 2.

[0038]FIG. 4 is a sectional view taken along the line B-B′ in FIG. 2.

[0039]FIG. 5 illustrates the distribution of mobility of n-channel typethin film transistors integrated on the same substrate.

[0040]FIG. 6 illustrates the distribution of mobility of p-channel typethin film transistors integrated on the same substrate.

[0041]FIG. 7 illustrates the distribution of thresholds of n-channeltype thin film transistors integrated on the same substrate.

[0042]FIGS. 8A through 8D illustrate steps for fabricating thin filmtransistors.

[0043]FIG. 9 illustrates a schematic configuration of bottom-gate typethin film transistors.

DETAILED DESCRIPTION OF PREFERRED EMBODIMENT

[0044] An active layer is formed by a crystalline silicon film having astructure wherein a multiplicity of crystal structures extending in acertain direction are arranged in parallel, and the direction in whichthe crystal structures extend is aligned with the direction of themoving direction of carriers. This makes it possible to provideadvantages that can not be achieved by conventional devices utilizingsingle crystal semiconductors and polycrystalline semiconductors.

[0045] The short channel effect is less likely to occur on such acrystalline silicon film formed by a multiplicity of crystal structuresextending in the form of columns in a certain direction even if thedimension of a channel is reduced because the movement of carriers isregulated in the direction in which they extend.

[0046] The reason is that the presence of a multiplicity of elongate andsubstantially monocrystalline regions (columnar regions) extending inparallel in the channel region suppresses the expansion of a depletionlayer in the channel between the source and drain regions.

[0047] In normal IC processing, efforts toward a finer structure resultin a significant short channel effect, and measures must be taken todope or diffuse impurities in the vicinity of a channel in order tosuppress this (which results in a very complicated structure). Thisincreases technical and economical difficulties.

[0048] However, a crystalline silicon film having a unique crystalstructure as described above is characterized in that it suppresses theshort channel effect without any complicated structure because of theuniqueness of the crystal structure of itself.

[0049] Thin film transistors obtained using the same can be free ofvariation in characteristics in a plane of the substrate as shown inFIGS. 5 through 7.

[0050] Meanwhile, crystalline silicon films provided on a glasssubstrate or quartz substrate using a conventional high temperatureprocess or low temperature process have had the so-calledpolycrystalline structure which is an aggregation of a multiplicity ofcrystal grains (particularly those having no anisotropism).

[0051] In this case, it becomes more difficult to control the state ofcrystal interfaces (particularly, the direction in which they extend andthe quantity thereof) present in a channel as the device structurebecomes finer.

[0052] Specifically, the quantity and direction of crystal interfacesthat exist in a channel vary from device to device with decreasing sizeof the channel, which results in variation in device characteristics.

[0053] However, crystalline silicon films obtained according to themethod shown in FIGS. 8A through 8D have crystal grain boundariesaligned in terms of the direction thereof and have widths which areconstant to some degree within a dimension of about 0.2 μm or less.Therefore, they are less likely to cause variation of characteristicsfrom device to device due to the presence of the crystal grainboundaries when the moving direction of carriers (especially inchannels) is matched with the direction in which the crystal interfacesextend.

[0054] The reason is that the state of the crystal structure in thechannel region is similar in every device.

[0055]FIG. 1 shows an internal equivalent circuit of an operationalamplifier formed by thin film transistors according to the presentembodiment. FIG. 2 shows a mask pattern for the operational amplifiercircuit represented by the equivalent circuit in FIG. 1. 201 designatesa positive input. 202 designates a negative input. 203 designates anickel-added region. 204 designates wiring on a first layer. 205designates wiring on a second layer.

[0056]FIG. 3 shows a sectional view taken along the line A-A′ in FIG. 2.FIG. 4 shows a sectional view taken along the line B-B′ in FIG. 2.

[0057] In this embodiment, nickel is introduced into the elongate regionspecified as the nickel-added region to cause crystallization of anamorphous silicon film to start there, thereby forming thin filmtransistors using this region.

[0058] In the circuit configuration shown in FIG. 1, it is importantthat transistors Tr₈ and Tr₄ forming a differential circuit at the inputportion have similar characteristics. 101 designates bias, and 102designates output.

[0059] This embodiment has a pattern arrangement such that active layersforming the transistors Tr₈ and Tr₄ are arranged in positions at thesame distance from the nickel-added region. This suppresses variation incharacteristics that otherwise occurs due to a difference in thedistance of crystal growth.

[0060] Referring to active layers forming transistors Tr₆ and Tr₇, theactive layers are formed in positions at different distances of crystalgrowth (distances from the nickel-added region) because they are formedutilizing crystal growth from the same nickel-added region. This canresult in a very slight difference in characteristics between thetransistors Tr₆ and Tr₇, but such a difference in characteristicsbetween the two transistors will not create any serious problem in thiscircuit configuration.

[0061] In this embodiment, thin film transistors having the distributionof characteristics in a plane of the substrate as shown in FIGS. 5through 7 are utilized.

[0062] While the characteristics of a single thin film transistor alonehave been a matter of concern in the prior art, in the case of aconfiguration of an operational amplifier circuit as shown in FIG. 1,what is important is characteristics on a collective basis (in otherwords, the distribution of characteristics or the distribution ofvariation in characteristics).

[0063] The thin film transistors are formed on a quartz substrateaccording to a method of fabrication to be described later.

[0064]FIG. 5 shows the distribution of mobility of n-channel type thinfilm transistors. FIG. 6 shows the distribution of mobility of p-channeltype thin film transistors. FIG. 7 shows the distribution of V_(th)(threshold voltages) of the n-channel thin film transistors.

[0065]FIGS. 5 through 7 show variation in the characteristics of TFTs ona single substrate. The ordinate axes of FIGS. 5 through 7 indicateratios of presence in terms of percentage. The TFTs have a single gatestructure fabricated according the method of fabrication to be describedlater wherein the channel length is 8 μm and the channel width is 8 μm.

[0066]FIG. 5 shows that 90% or more of the n-channel type TFTs formed onthe same substrate have mobility of 260 cm²/Vs or more.

[0067]FIG. 6 shows that 90% or more of the resultant p-channel type TFTshave mobility of 150 cm²/Vs or more.

[0068] The above description means that 90 TFTs or more out of 100 TFTswhich have been arbitrarily selected have the mobility as describedabove on average.

[0069] When an integrated circuit such as an operational amplifier isconfigured, it is important to use a group of elements having smallvariation in characteristics as shown in FIGS. 5 through 7.

[0070] For example, variation of V_(th) (threshold voltage) is animportant consideration when using a power supply voltage for driving of5 V or 3.3 V or 1.5 V which will be more frequently used in the future.

[0071] [Method of Fabricating Thin Film Transistors]

[0072]FIGS. 8A through 8D schematically show steps for fabricating thinfilm transistors used in an operational amplifier circuit having apattern arrangement as shown in FIG. 2.

[0073] First, an amorphous silicon film 802 is formed on a quartzsubstrate 801 to a thickness of 500 Å using low pressure thermal CVD. Itis important that the quartz substrate used has a sufficiently smoothsurface.

[0074] The thickness of the amorphous silicon film is preferably in therange from about 100 Å to about 1000 Å. The reason is that the thicknessof an active layer is suppressed to some degree in order to achieve anannealing effect by irradiation with laser beams performed at asubsequent step of activating source and drain regions.

[0075] After the amorphous silicon film 802 is formed, a mask indicatedby 803 is formed by a silicon oxide film which is formed using plasmaCVD. This mask is formed with a hole indicated by 805 to provide astructure wherein the amorphous silicon film 802 is exposed in thisregion.

[0076] The hole 805 extends in the direction perpendicular to the planeof the drawing (this hole corresponds to the nickel-added region 203 inFIG. 2).

[0077] After the mask 803 is formed, a solution of nickel acetatecontaining nickel of 10 ppm by weight is applied using spin coating.Thus, a state as indicated by 804 is realized wherein nickel is retainedin contact with the surface (FIG. 8A).

[0078] While a method of introducing nickel utilizing a solution hasbeen described here, nickel may be introduced on to the surface of theamorphous silicon film using methods such as CVD, sputtering, plasmaprocessing and gas adsorption.

[0079] Further, as a method of introducing nickel in a more accuratelycontrolled quantity and position, a method based on ion implantation canbe employed.

[0080] Instead of nickel, an element selected from among Fe, Co, Ru, Rh,Pd, Os, Ir, Pt, Cu and Au may be used. Such elements have a function ofpromoting crystallization of silicon.

[0081] Next, a heating process is performed in a nitrogen atmosphere foreight hours at 600° C. At this step, crystal growth proceeds in adirection in parallel with the substrate as indicated by 800.

[0082] After the crystallization achieved by this heating process, thereare defects in the film in a high density and the uniqueness of thecrystal structure to be detailed below is still insignificant (FIG. 8A).

[0083] The above-described heating process may be performed within atemperature range from 450° C. to the temperature that the substrate canwithstand (about 1100° C. in the case of a quartz substrate).

[0084] Next, the mask 803 is removed. A heating process is thenperformed for 20 minutes at 950° C. in an oxygen atmosphere containing3% HCl by volume. This step forms a thermal oxidation film having athickness of 200 Å on the surface of the silicon film. The thickness ofthe silicon film is reduced to 400 Å at this step.

[0085] This step of heating process is important. This step of heatingprocess anneals the crystalline silicon film and removes nickel from thefilm. This heating process provides a unique crystalline silicon filmformed by a multiplicity of columnar crystal structures extending in acertain direction in the form of columns having widths in the range fromabout 0.5 μm to about 2 μm.

[0086] The formation of the thermal oxidation film provides two effects.One of the effects is a reduction of nickel in the silicon film as aresult of absorption of nickel into the thermal oxidation film.

[0087] The other is an effect wherein silicon atoms which have beenredundant or unstably bonded are consumed as the thermal oxidation filmis formed to reduce defects greatly and consequently to improvecrystallinity.

[0088] Then, the thermal oxidation film thus formed is removed. Sincethis thermal oxidation film contains nickel in a relatively highdensity, the removal of the thermal oxidation film makes it possible toeventually prevent nickel from adversely affecting the devicecharacteristics.

[0089] When the 400 Å thick silicon film is thus obtained, it ispatterned to form active layers of thin film transistors. FIG. 8B showsactive layers indicated by 806 and 807.

[0090] It is important here to set the direction in which the sourcesand drains are connected or the moving direction of carriers in thechannels such that it matches the direction of the above-describeddirection of crystal growth (which coincides with the direction in whichthe above-described columnar crystal structures extend).

[0091] In FIG. 8B, 806 designates an active layer of a p-channel typethin film transistor, and 807 designates an active layer of an n-channeltype thin film transistor.

[0092] Although steps for fabricating only two thin film transistors areillustrated here, in practice, a multiplicity of nickel-added regions asillustrated in FIG. 2 are provided on the substrate to form amultiplicity of thin film transistors simultaneously.

[0093] After the active layers are formed, plasma CVD is performed toform a silicon oxide film having a thickness of 300 Å which is to serveas a part of a gate insulation film. Further, the second thermaloxidation is carried out in an oxygen atmosphere containing 3% HCl byvolume to form a thermal oxidation film to a thickness of 300 Å. Thisprovides a gate insulation film having a thickness of 600 Å consistingof the CVD-oxidated silicon film and the thermal oxidation film. As aresult of this second formation of a thermal oxidation film, thethickness of the active layers is reduced to 250 Å.

[0094] Next, gate electrodes 808 and 809 made of aluminum are formed.After the gate electrodes are formed, anodization is carried out tofirst form porous anodic oxide films 810 and 811. Further, the secondanodization is carried out to form anodic oxide films 812 and 813 havingdenser film properties. The difference in the properties of the anodicoxide films may be selected depending on the type of electrolyte used.

[0095] Next, the exposed gate insulation film is removed. FIG. 8B showsgate insulation films 814 and 815 left thereon.

[0096] In this state, doping for providing conductivity types is carriedout using plasma doping. Here, doping of B (boron) is carried out firstwith the region to become an n-channel type thin film transistor maskedwith a resist mask. Then, doping of P (phosphorus) is carried out withthe region to become a p-channel type thin film transistor masked with aresist mask.

[0097] The doping at this step is performed under conditions for formingsource and drain regions. At this step, a source region 816 and a drainregion 817 of a p-channel type TFT and a source region 819 and a drainregion 818 of an n-channel type TFT are formed on a self-alignmentbasis.

[0098] Thus, the state shown in FIG. 8B is realized. Next, the porousanodic oxide films 810 and 811 are removed.

[0099] Next, the second doping is carried out under conditions for lightdoping. At this step, low density impurity regions 820, 821, 823 and 824are formed on a self-alignment basis. Further, channel formation regions825 and 826 are formed on a self-alignment basis.

[0100] The low density impurity regions toward the drain regions becomeregions referred to as LDDs (lightly doped drains).

[0101] After the doping, laser beams are projected to activate the dopedelements and to anneal damage on the active layers caused by the doping.This step may be performed using methods that employ irradiation withultraviolet beams and infrared beams.

[0102] Next, a silicon nitride film 827 as a layer insulation film isformed using plasma CVD to a thickness of 1500 Å, and a layer insulationfilm 828 made of polyimide resin is further formed. The use of resin forthe layer insulation film allows the surface thereof to be planarized.

[0103] In addition to polyimide resin, it is possible to use polyamideresin, polyimideamide resin, acrylic resin, epoxy resin or the like.

[0104] Next, contact holes are formed to form a source electrode (andsource wiring) 829 and a drain electrode (and drain wiring) 830 of thep-channel type TFT. Further, there is formed a source electrode (andsource wiring) 832 and a drain electrode (and drain wiring) 831 of then-channel type TFT.

[0105] There is thus provided a configuration wherein a p-channel typethin film transistor and an n-channel type thin film transistor areintegrated.

[0106] According to the fabrication steps described here, it is possibleto provide thin film transistors having excellent characteristics asshown in FIGS. 5 through 7 with less variation of characteristics byusing a set of a multiplicity of columnar crystal structures extendingin parallel in a certain direction as active layers.

[0107] Referring further to the characteristics, both of p- andn-channel type thin film transistors can be provided with S-values of100 mV/dec or less on average.

[0108] The use of such thin film transistors makes it possible toconfigure an operational amplifier circuit as shown in FIGS. 1 and 2.

[0109] [Another Configuration of Thin Film Transistor]

[0110]FIG. 9 shows another form of thin film transistors to which thepresent invention can be applied.

[0111] The thin film transistor shown in FIG. 9 is a bottom gate typethin film transistor and has a structure in which gate electrodes 902and 903 are formed on a quartz substrate 901; a gate insulation film 904is further formed; and an active layer is formed thereon.

[0112] In the configuration shown in FIG. 9, the active layer must beformed after forming the gate electrodes and gate insulation film.Therefore, the active layer is formed in accordance with theabove-described steps for fabricating thin film transistors shown inFIG. 8 after the gate insulation film is formed.

[0113] [Still Another Configuration of Thin Film Transistor]

[0114] The steps for fabricating thin film transistors shown in FIGS. 8Athrough 8D represent an example wherein aluminum is used for gateelectrodes. Tantalum may be used instead of aluminum. Tantalum can alsobe anodized and can be used for fabrication of thin film transistorsaccording to the fabrication steps shown in FIGS. 8A through 8D.

[0115] Further, polysilicon and silicide having conductivity types canbe used for gate electrodes. In this case, however, it is not possibleto obtain the advantage of low resistance which is available whenaluminum is used.

[0116] The use of present invention makes it possible to fabricate apractical operational amplifier circuit using thin film transistors.

[0117] Although the present invention and its advantages have beendescribed in detail, it should be understood that various changes,substitutions and alterations can be made herein without departing fromthe spirit and scope of the invention as defined by the appended claims.

What is claimed is:
 1. A semiconductor device comprising: n-channel typethin film transistors provided over an insulating surface; p-channeltype thin film transistors provided over said insulating surface; andoperational amplifier circuits provided over said insulating surface andcomprising said n-channel type thin film transistors and said p-channeltype thin film transistors, wherein cumulative distribution ofmobilities of said n-channel type thin film transistors is 90% or moreat 260 cm²/Vs; and wherein cumulative distribution of mobilities of saidp-channel type thin film transistors is 90% or more at 150 cm²/Vs.
 2. Adevice according to claim 1 wherein said n-channel type thin filmtransistors and said p-channel type thin film transistors are providedover a quartz substrate.
 3. A device according to claim 1 wherein anaverage S-value of said p-channel type thin film transistors and saidn-channel type thin film transistors is 100 mV/dec or less.
 4. A deviceaccording to claim 1 wherein each of said n-channel type thin filmtransistors comprises a source region and a drain region which are dopedwith phosphorus.
 5. A device according to claim 1 wherein each of saidp-channel type thin film transistors comprises a source region and adrain region which are doped with boron.
 6. A device according to claim1 wherein each of said p-channel type thin film transistors and saidn-channel type thin film transistors has a channel length longer than alength of a lightly doped drain thereof.
 7. A semiconductor devicecomprising: n-channel type thin film transistors provided over aninsulating surface; p-channel type thin film transistors provided oversaid insulating surface; and differential circuits provided over saidinsulating surface and comprising said n-channel type thin filmtransistors and said p-channel type thin film transistors, whereincumulative distribution of mobilities of said n-channel type thin filmtransistors is 90% or more at 260 cm²/Vs; and wherein cumulativedistribution of mobilities of said p-channel type thin film transistorsis 90% or more at 150 cm²/Vs.
 8. A device according to claim 7 wherein apart of said differential circuits constitutes an operational amplifier.9. A device according to claim 7 wherein said n-channel type thin filmtransistors and said p-channel type thin film transistors are providedover a quartz substrate.
 10. A device according to claim 7 wherein anaverage S-value of said p-channel type thin film transistors and saidn-channel type thin film transistors is 100 mV/dec or less.
 11. A deviceaccording to claim 7 wherein each of said n-channel type thin filmtransistors comprises a source region and a drain region which are dopedwith phosphorus.
 12. A device according to claim 7 wherein each of saidp-channel type thin film transistors comprises a source region and adrain region which are doped with boron.
 13. A device according to claim7 wherein each of said p-channel type thin film transistors and saidn-channel type thin film transistors has a channel length longer than alength of a lightly doped drain thereof.
 14. A semiconductor devicecomprising: n-channel type thin film transistors provided over aninsulating surface; p-channel type thin film transistors provided oversaid insulating surface; and operational amplifier circuits providedover said insulating surface and comprising said n-channel type thinfilm transistors and said p-channel type thin film transistors, whereincumulative distribution of mobilities of said n-channel type thin filmtransistors is 90% or more at 260 cm²/Vs, wherein cumulativedistribution of mobilities of said p-channel type thin film transistorsis 90% or more at 150 cm²/Vs, and wherein a channel formation region ofeach of said n-channel type thin film transistors and said p-channeltype thin film transistors comprises a columnar crystal extending in adirection which is aligned with a direction of a moving direction ofcarriers in said channel formation region.
 15. A device according toclaim 14 wherein said columnar crystal has a width which is constantwithin a dimension of 0.2 μm or less.
 16. A device according to claim 14wherein said n-channel type thin film transistors and said p-channeltype thin film transistors are provided over a quartz substrate.
 17. Adevice according to claim 14 wherein an average S-value of saidp-channel type thin film transistors and said n-channel type thin filmtransistors is 100 mV/dec or less.
 18. A device according to claim 14wherein each of said n-channel type thin film transistors comprises asource region and a drain region which are doped with phosphorus.
 19. Adevice according to claim 14 wherein each of said p-channel type thinfilm transistors comprises a source region and a drain region which aredoped with boron.
 20. A device according to claim 14 wherein each ofsaid p-channel type thin film transistors and said n-channel type thinfilm transistors has a channel length longer than a length of a lightlydoped drain thereof.
 21. A semiconductor device comprising: n-channeltype thin film transistors provided over an insulating surface;p-channel type thin film transistors provided over said insulatingsurface; and differential circuits provided over said insulating surfaceand comprising said n-channel type thin film transistors and saidp-channel type thin film transistors, wherein cumulative distribution ofmobilities of said n-channel type thin film transistors is 90% or moreat 260 cm²/Vs, wherein cumulative distribution of mobilities of saidp-channel type thin film transistors is 90% or more at 150 cm²/Vs, andwherein a channel formation region of each of said n-channel type thinfilm transistors and said p-channel type thin film transistors comprisesa columnar crystal extending in a direction which is aligned with adirection of a moving direction of carriers in said channel formationregion.
 22. A device according to claim 21 wherein a part of saiddifferential circuits constitutes an operational amplifier.
 23. A deviceaccording to claim 21 wherein said n-channel type thin film transistorsand said p-channel type thin film transistors are provided over a quartzsubstrate.
 24. A device according to claim 21 wherein an average S-valueof said p-channel type thin film transistors and said n-channel typethin film transistors is 100 mV/dec or less.
 25. A device according toclaim 21 wherein each of said n-channel type thin film transistorscomprises a source region and a drain region which are doped withphosphorus.
 26. A device according to claim 21 wherein each of saidp-channel type thin film transistors comprises a source region and adrain region which are doped with boron.
 27. A device according to claim21 wherein each of said p-channel type thin film transistors and saidn-channel type thin film transistors has a channel length longer than alength of a lightly doped drain thereof.